MYC-J7A100T
MYC-J7A100T
Measuring only 69.6mm by 40mm, the MYC-J7A100T is a compact System-on Module (SoM) based on the powerful AMD/Xilinx XC7A100T FPGA (XC7A100T-2FGG484I), which belongs to the AMD Artix-7 family. Additionally, it features onboard 512MB DDR3, 32MB QSPI FLASH, and 32KB EEPROM. A variety of IO signals are available through the 0.5 mm pitch 260-pin MXM gold-finger-edge-card connector, facilitating easy connection with MYIR’s standard base board of the MYD-J7A100T development board or customized base boards from users. Furthermore, the MYC-J7A100T SOM provides a total of 178 FPGA IOs, 4 pairs of GTP high-speed transceiver interfaces, and one JTAG interface. Among the 178 FPGA IOs, 80 operates at 3.3V level, while the remaining 98 are user-configurable with various levels (1.2/1.35/1.5/1.8/2.5/3.3V). It is suitable for various fields, including industrial control, automation, communication, computing, and more.
MYC-J7A100T Top-Bottom-view
- AMD/Xilinx XC7A100T Artix-7 FPGA (XC7A100T-2FGG484I)
- 512MB DDR3, 32MB QSPI FLASH, 32KB EEPROM
- 0.5mm Pitch 260-pin MXM Gold-finger-edge-card Connector
- Support Working Temperature Ranging from -40 to 85 Celsius
- Supports Development by Xilinx's Vivado Design Suite
MYIR offers the MYD-J7A100T Development Board for evaluating the MYC-J7A100T SOM. This extensive development board not only demonstrates the capabilities of the MYC-J7A100T but also provides a convenient and efficient means for developers to explore its features and functionalities. Its expansion board interfaces with the MYC-J7A100T SOM via a 0.5mm pitch, 260-pin MXM gold-finger-edge-card connector. The MYD-J7A100T uses a 12V/2A DC power supply and boasts a diverse range of peripheral interfaces, including two Gigabit Ethernet ports, two SFP+ interfaces, a PCIe 2.0 interface, HDMI input and output interfaces, a DVP camera interface, a Micro SD slot, a USB-UART interface, and a FAN interface. Additionally, a 2.5mm pitch 2x 20-pin IO expansion interface offers further expansion capabilities, allowing users to connect additional peripherals or modules as required.
MYIR provides a range of Vivado sample codes for testing purposes, enabling users to quickly get started with developing their solutions. The MYD-J7A100T Development Board serves as an excellent platform for evaluating and developing applications based on the MYC-J7A100T SOM and other Artix-7 FPGA solutions.
MYIR also provides optional enhancements for the board, such as the MY-CAM011B Camera Module, and the MY-WIREDCOM RPI Module (RS232/RS485). These additions significantly expand the board's functionality, enabling users to enjoy versatile capabilities tailored to their specific project requirements.
Features
Mechanical Parameters
- Dimensions: 69.6mm x 40mm
- PCB Layers: 12-layer design
- Power supply: 5V/3A
- Working temperature: -40~85 Celsius (industrial grade)
FPGA
- AMD/Xilinx XC7A100T Artix-7 FPGA (XC7A100T-2FGG484I)
Memory
- 512MB DDR3
- 32MB QSPI Flash
- 32KB EEPROM
OS Support
- Linux 4.1.18
Order Part No Packing List
| Item | Part No. | Packing List |
|---|---|---|
| MYC-J7A100T System-On-Module | MYC-J7A100T-32Q512D-I | One MYC-J7A100T Module |
| MYD-J7A100T Development Board | MYD-J7A100T-32Q512D-I |
|
Hardware Specification
The AMD/Xilinx Artix®-7 family of FPGAs has redefined cost-sensitive solutions by cutting power consumption in half from the previous generation while providing best-in-class transceivers and signal processing capabilities for high bandwidth applications. Built on the 28nm HPL process, these devices deliver best in class performance-per-watt. Together with the MicroBlaze(TM) soft processor, Artix-7 FPGAs are ideal for products like portable medical equipment, military radios, and compact wireless infrastructure. Artix-7 FPGAs meet the needs of size, weight, power, and cost (SWaP-C) sensitive markets like avionics and communications.
The MYC-J7A100T uses the XC7A100T-2FGG484I device, offering an extensive range of features including up to 101,440 logic cells, 4,860 Kb of Block RAM, 240 DSP slices, 929 GMAC/s, 8 GTP transceivers capable of reaching speeds up to 6.6Gb/s, x4 Gen2 PCIe interface, and a total of 285 I/O pins, all contained within the FGG484 package.
Software Features
MYIR provides a range of Vivado sample codes for testing purposes, enabling users to quickly get started with developing their solutions based on MYIR’s MYD-J7A100T development board. The provided project files are listed in below table:
| Vivado Project File | Description | Source Code |
|---|---|---|
| led_test | User LED Test | YES |
| key_test | Development Board Keys Test | YES |
| uart_test | UART Test | YES |
| hdmi_out_test | HDMI Output Interface Test | YES |
| ddr_test | DDR3 Test | YES |
| sd_hdmi_out | SD Card Read/Write Function Test | YES |
| hdmi_in_ddr_hdmi_out | HDMI Input Interface Test | YES |
| ov2659_ddr_hdmi_out | Camera Output Display Test | YES |
| sfp_test | SFP Loopback Test | YES |
| pcie_test | PCIe Read/Write Function Test | YES |
| udp_cmos_rgmii | Ethernet UDP Function Test | YES |
| İşlemci Tipi | : | TI |