MYD-CZU3EG/4EV/5EV-V2 Development Board
MYD-CZU3EG/4EV/5EV-V2 Development Board
The MYD-CZU3EG/4EV/5EV-V2 development board consists of the MYC-CZU3EG/4EV/5EV-V2 CPU Module and a specially designed base board to provide a complete and versatile platform for evaluating and prototyping based on Xilinx Zynq UltraScale+ MPSoC devices. MYIR supplies the development board and CPU Module with ZU3EG, ZU4EV and ZU5EV variants.
The MYC-CZU3EG/4EV/5EV-V2 CPU Module is an Arm SOM with integrated XCZU3EG-1SFVC784 / XCZU4EV-1SFVC784 / XCZU5EV-2SFVC784 MPSoC, 4GB DDR4, 4GB eMMC, 128MB QSPI Flash, Ethernet PHY, USB PHY and Intel Power Module. It is mounted on the MYD-CZU3EG/4EV/5EV-V2 base board through two 0.5mm pitch 160-pin Razor Beam High-Speed Sockets.
The MYD-CZU3EG/4EV/5EV-V2 Zynq UltraScale+ MPSoC development board has extended a rich peripheral set and interfaces on the base board through connectors and headers including USB 3.0, Gigabit Ethernet, CAN, TF, DisplayPort (DP), PCIe interface, SATA interface, JTAG, HDMI, LCD interface, ARDUINO User Interface, PMoD, FMC, and four SFP+ interfaces (for EV MPSoCs only).
MYC-CZU3EG/4EV/5EV-V2 CPU Module
- MYC-CZU3EG/4EV/5EV-V2 CPU Module as Controller Board
- Xilinx Zynq UltraScale+ ZU3EG /ZU4EV /ZU5EV MPSoC based on 1.2 GHz Quad Arm Cortex-A53 and 600MHz Dual Cortex-R5 Cores
- 4GB DDR4 SDRAM (64 bit, 2400MHz)
- 4GB eMMC Flash, 128MB QSPI Flash
- USB 3.0, Gigabit Ethernet, CAN, TF, DP, PCIe, SATA, HDMI, LCD
- PMoD, FMC, SFP+ (for EV MPSoCs), ARDUINO User Interface
- Optional 7-inch LCD Modules and USB Camera and WiFi Modules
- Ready-to-Run PetaLinux 2020.1
- Supports Xilinx Vitis Software Development Platform
The MYD-CZU3EG/4EV/5EV-V2 is capable of running PetaLinux and comes with necessary cable accessories as well as detailed documentations and software package. It can support Xilinx Vitis Software development platform. Typical applications are the Internet, cloud computing, Data center, Machine Vision, Military facilities, Flight navigation and other embedded applications.
MYD-CZU3EG/4EV/5EV-V2 Development Board (delivered with active heatsink on CPU Module by default)
Features
Mechanical Parameters
- Dimensions: 60.00 mm x 52.00 mm (CPU Module), 195.33mm x 123.95mm (base board)
- PCB Layers: 12-layer design (CPU Module), 6-layer design (base board)
- Power supply: 3.3V (CPU Module), 12V (base board)
- Working temp.: 0~70 Celsius (commercial grade)
MPSoC
- Xilinx Zynq UltraScale+ XCZU3EG-1SFVC784 / XCZU4EV-1SFVC784 / XCZU5EV-2SFVC784 MPSoC
- 1.2GHz 64 bit Quad-core ARM® Cortex™-A53
- 600MHz Dual-core ARM® Cortex™-R5 processor
- ARM Mali™-400MP2 Graphics Processor
- 16nm FinFET+ FPGA fabric
Memory
- 4GB DDR4 SDRAM (64bit, 2400MHz)
- 4GB eMMC Flash
- 128MB QSPI Flash
Peripherals and Signals Routed to Pins
- Gigabit Ethernet PHY
- USB PHY
- Power Module
- Clock Generator
- Watchdog
- Four LEDs
- One yellow LED for ERROR_STATUS indicator (indicate a secure lockdown state)
- One yellow LED for ERROR_OUT indicator (Asserted for accidental power loss, hardware error)
- One green LED for PS_Done indicator (indicate the PL configuration is done)
- One green LED for PS_INIT indicator (indicate the PS is initialized after a power-on reset)
- Two Samtec 0.5mm pitch 160-pin Razor Beam High-Speed socket bring out
- 4 PS GTR transceivers along with 2 GTR reference clock inputs
- PS JTAG interface, USB 2.0 interface, Gigabit Ethernet interface and etc.
- 4 PL GTH transceivers along with 1 GTH reference clock input (only for Zynq UltraScale+ EV Devices)
- 156 user PL I/O pins
OS Support
- PetaLinux 2020.1
The MYD-CZU3EG/4EV/5EV-V2 Base Board (MYB-CZU3EG/4EV/5EV)
PS Unit
- One USB 3.0 (Type-C interface)
- One USB to UART port
- One TF card slot
- One CAN interface
- One 10/100/1000Mbps Ethernet interface
- One PCIe interface
- One SATA interface
- One 2.54mm pitch 14-pin JTAG interface (PS, PL reused)
- Buttons (one user button, one system reset button and one ps-programming button)
- One DisplayPort (DP)
- Battery backed RTC
PL Unit
- One Xilinx standard LPFMC interface
- One HDMI interface (signals reused with LCD/TSP interface)
- Four SFP+ transceiver interfaces (up to 10Gbps, only for Zynq UltraScale+ EV Devices)
- Two-channel Pmod
- ARDUINO user interface
- LCD/TSP interface (24-bit RGB, supports resistive and capacitive touch screen panels)
- LEDs
- One blue LED for power indicator
- One red LED for FPGA programming indicator
- One green LED for user defined
Order Part No and Packing List
| Item | Part No. | Included |
|---|---|---|
|
MYD-CZU3EG-V2 Development Board |
MYD-CZU3EG-V2-4E4D-1200-C |
- One MYD-CZU3EG/4EV/5EV-V2 Board |
|
MYD-CZU4EV-V2 Development Board |
MYD-CZU4EV-V2-4E4D-1200-C |
|
|
MYD-CZU4EV-V2 Development Board |
MYD-CZU5EV-V2-4E4D-1200-C |
|
|
MYC-CZU3EG-V2-4E4D-1200-C |
- One MYC-CZU3EG-V2 CPU Module |
|
|
MYC-CZU4EV-V2-4E4D-1200-I-FAN |
- One MYC-CZU4EV-V2 CPU Module |
|
|
MYC-CZU5EV-V2-4E4D-1200-I-FAN |
- One MYC-CZU5EV-V2 CPU Module |
|
|
MY-TFT070RV2 |
7-inch LCD Module with resistive touch screen |
|
|
MY-TFT070CV2 |
7-inch LCD Module with capacitive touch screen |
Hardware Features
Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing. Built on a common real-time processor and programmable logic equipped platform, three distinct variants include dual application processor (CG) devices, quad application processor and GPU (EG) devices, and video codec (EV) devices.
The Zynq UltraScale+ family provides footprint compatibility to enable users to migrate designs from one device to another. Any two packages with the same footprint identifier code (last letter and number sequence) are footprint compatible. MYIR is using the XCZU3EG-1SFVC784 MPSoC for MYD-CZU3EG-V2 Development Board, XCZU4EV-1SFVC784 MPSoC for MYD-CZU4EV-V2 Development Board, XCZU5EV-2SFVC784 MPSoC for MYD-CZU5EV-V2 Development Board by default, the C784 package covers the widest footprint compatibilities that enable users to select devices among CG, EG and EV.
MYIR may also supply the MYC-CZU3EG-V2 CPU Modules with XCZU2CG, XCZU3CG, XCZU4EV or XCZU5EV MPSoC as options. The main features for the MPSoC devices are summarized as below.
|
Device |
XCZU2CG |
XCZU3CG |
XCZU3EG |
XCZU4EV |
XCZU5EV |
|
Logic cells (k) |
103 |
154 |
154 |
192 |
256 |
|
CLB Flip-Flops (K) |
94 |
141 |
141 |
176 |
234 |
|
CLB LUTs (K) |
47 |
71 |
71 |
88 |
117 |
|
Block RAM (Mb) |
5.3 |
7.6 |
7.6 |
4.5 |
5.1 |
|
UltraRAM (Mb) |
- |
- |
- |
13.5 |
18.0 |
|
DSP Slices |
240 |
360 |
360 |
728 |
1,248 |
|
GTX transceivers |
PS-GTR4x (6Gb/s) |
PS-GTR4x (6Gb/s) |
PS-GTR4x (6Gb/s) |
PS-GTR4x (6Gb/s), GTH4x (16.3Gb/s) |
PS-GTR4x (6Gb/s), GTH4x (16.3Gb/s) |
|
Processor Units |
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Application Processor Unit |
Dual-core ARM® Cortex™-A53 MPCore™ up to 1.3GHz |
Quad-core ARM® Cortex™-A53 MPCore™ up to 1.5GHz |
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Memory w/ECC |
L1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256KB |
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|
Real-Time Processor Unit |
Dual-core ARM Cortex-R5 MPCore™ up to 600MHz |
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Memory w/ECC |
L1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per core |
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Graphics Processing Unit |
- |
- |
Mali™-400 MP2 up to 667MHz |
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Video Codec |
- |
- |
- |
H.264 / H.265 |
|
|
Memory L2 Cache |
64KB |
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External Memory, Connectivity, Integrated Block Functionality |
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Dynamic Memory Interface |
x32/x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECC |
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Static Memory Interfaces |
NAND, 2x Quad-SPI |
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High-Speed Connectivity |
PCIe® Gen2 x4, 2x USB3.0, SATA 3.1, DisplayPort, 4x Tri-mode Gigabit Ethernet |
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General Connectivity |
2 x USB 2.0, 2 x SD/SDIO, 2 x UART, 2 x CAN 2.0B, 2 x I2C, 2 x SPI, 4 x 32b GPIO |
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Power Management |
Full / Low / PL / Battery Power Domains |
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Security |
RSA, AES, and SHA |
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AMS - System Monitor |
10-bit, 1MSPS – Temperature and Voltage Monitor |
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Software Features
The MYD-CZU3EG/4EV/5EV-V2 Development Board is preloaded with PetaLinux 2020.1. MYIR provides software package in product disk along with the goods delivery. The software package features as below:
| Item | Features | Description | Remark |
|---|---|---|---|
| Cross compiler | gcc 9.2.0 | gcc version 9.2.0 | |
| gcc 5.2.1 | gcc version 5.2.1 (Linaro GCC5.2) | ||
| Boot program | BOOT.BIN | First boot program including FSBL, u-boot2020.01 | Source code provided |
| Linux Kernel | Linux 5.4.0 | Customized kernel for MYD-CZU3EG/4EV/5EV-V2 Board | Source code provided |
| Drivers | SFP & SFP+ | SFP driver and SFP+ driver (only for MYD-CZU4EV/5EV-V2) | Source code provided |
| USB Host | USB2.0/USB3.0 Host driver | Source code provided | |
| Ethernet | Gigabit Ethernet driver | Source code provided | |
| MMC/SD/TF | MMC/SD/TF card driver | Source code provided | |
| QSPI Flash | QSPI Flash driver | Source code provided | |
| PCIE | PCIE network card driver | Source code provided | |
| CAN | CAN driver | Source code provided | |
| LCD Controller | LCD driver | Source code provided | |
| DP Controller | DP Display driver | Source code provided | |
| HDMI | HDMI (SII902X chip) driver | Source code provided | |
| Button | Button driver | Source code provided | |
| UART | UART driver | Source code provided | |
| I2C | I2C driver | Source code provided | |
| LED | LED driver | Source code provided | |
| GPIO | GPIO driver | Source code provided | |
| QSPI | QSPI Flash MT25QU512ABB driver | Source code provided | |
| Touch Screen | TSC2007 resistive touch screen driver | Source code provided | |
| FT5X0X capacitive touch screen driver | Source code provided | ||
| SATA | SATA HD driver | Source code provided | |
| Watch dog | Watch dog driver | Source code provided | |
| Example | Including button, LED, CAN, Socket examples | ||
| File System | Ramdisk | Ramdisk system image | File System |
| Rootfs.tar | Buildroot, including QT | Source code provided | |
| Petalinux | Petalinux2020.1 |
Supports Xilinx development tools for PetaLinux 2020.1 and provides complete |
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| İşlemci Tipi | : | Xilinx |